<---------------------- EXPANDABLE CROSS ASSEMBLER LINKER --------------------> Written By: Pat Crowe This control file defines the assembly syntax and help data for a specific microprocessor and must be 'INSTALLed' within ECAL to configure the system. The text below may be displayed by pressing the F1-key when selecting the installed m(N)emonics from the main menu. <------------------------------------------------------------------------------> .help PROGRAMMER'S OVERVIEW Microprocessor: Gameboy. Revision(s): 1.00 - 24/06/00. REGISTER MODEL: Internal registers of the Gameboy are as follows:- General Registers: 15 8:7 0 ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ A ³ Flags ³ AF ³ B ³ C ³ BC ³ D ³ E ³ DE ³ H ³ L ³ HL ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ Special Registers ³ SP ³ Stack Pointer ³ PC ³ Program Counter ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ STATUS REGISTER (F) IN DETAIL: Alongside the A register is a status register (referred to as F or Flags register). It is a special register that cannot be directly accessed but instead individual bits are set/reset according to the status of results generated during instructions. These bits (or flags) can be tested by certain instructions to allow program flow to be altered according to set conditions. The 'F' register is allocated as follows: 7 6 5 4 3 2 1 0 ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Z N H C 0 0 0 0 ³ Flag Register (F) ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Z - Zero Set to 1 when the result value is all 0's after an arithmetic/ logical/shift and other operations. BIT instructions and Block I/O also affect this flag. N - Add/Subtract Set to 1 when the previous operation was a subtract. Also affected by other operations. Primarily used for 'packed BCD' arithmetic adjustments. H - Half Carry Set to 1 when a byte arithmetic ADD/SUB causes a carry/borrow into/from bit4 of the A register. Primarily used for 'packed BCD' arithmetic adjustments. Logical and shift operations also affect this flag. C - Carry Set to 1 when a carry from the MSBit of the result or operand occurred. This flag can be explicitly set and reset via the SCF and CCF instructions. Other than the conditional execution instructions, you can save the current flag status onto the stack area using the PUSH/POP instructions. SPECIAL ASSEMBLY CONSIDERATIONS: 1. You should avoid creating labels which are equivalent to special register names of the Z80 (ie A or HL). .end ;------------------------------------------------------------------------------- ;INSTALL Commands 0 MODEL EXP16,PCBYTES 0 CPUTYPE 0 0 FLAG ZNHC ;Flag display index (up to 8) 0 FLAGST *10?U ;Optional Flag parameter char's 0 IMFID 70 ;------------------------------------------------------------------------------- ;TYPE definitions q E<>16 ALIGN 1 ;2 byte address n EAND 0FFFFFF00H ;1 byte value (range 0..255) ALIGN 0 e E<>16 LOW16 PCMOD NEXT PCREL ;PC relative offset E< -128 E> 127 AND 000FFH ALIGN 0 f E<>16S LOW16 E< -128 ;IX/IY Relative offset (1 byte) - inserted before last opcode E> 127 AND 000FFH ALIGN 1 b EAND 0FFFFFFF8H ;BIT select (bit 3-5) LOW16 SHL 3 ALIGN 0 ^x EAND 0FFFFFFC7H ;Allowed value is 00H, 08H.... ALWAYS 1 ;------------------------------------------------------------------------------ ;SET definitions r SET 1 ;Register set (1 char) - shifted 3 places - ALWAYS 1st opcode A 111000B B 000000B C 001000B D 010000B E 011000B H 100000B L 101000B ALWAYS 1 s SET 1 ;Register set (1 char) - shifted 3 places - ALWAYS 2nd opcode A 111000B B 000000B C 001000B D 010000B E 011000B H 100000B L 101000B ALWAYS 2 g SET 1 ;Register set (1 char) - A 111B B 000B C 001B D 010B E 011B H 100B L 101B ALWAYS 2 w SET 2 ;Register set (2 char) always affect 2nd opcode BC 000000B DE 010000B HL 100000B SP 110000B ALWAYS 2 v SET 2 ;Register set (2 char) always affect 1st opcode BC 000000B DE 010000B HL 100000B SP 110000B ALWAYS 1 p SET 2 ;PUSH/POP Register set (2 char) AF 110000B BC 000000B DE 010000B HL 100000B ALIGN 0 x SET 3 ;ReSTart positions code 00H 11000111B 08H 11001111B 10H 11010111B 18H 11011111B 20H 11100111B 28H 11101111B 30H 11110111B 38H 11111111B ALIGN 0 ;------------------------------------------------------------------------------ ;MNEMONIC definitions ADC A,(HL) :8,08EH,'Add With Carry,0' A,g :4,10001gggB A,n :8,0CEH,nnnnnnnnB .help Add an operand to the A or HL register plus the C flag from the status register. .end ADD A,(HL) :8,086H,'Add Excl. carry,?0' A,g :4,10000gggB A,n :8,0C6H,nnnnnnnnB HL,w :8,00ww1001B SP,f :16,0E8H,ffffffffB .help Add an operand to the A or HL register. .end AND (HL) :8,0A6H,'Boolean AND Acc ,010' g :4,10100gggB n :8,0E6H,nnnnnnnnB .help Logical AND an operand to the A register, with the result being returned to the A register. .end BIT b,(HL) :16,0CBH,01bbb110B,'Test Bit State ,*01.' b,g :8,0CBH,01bbbgggB,:8 .help Test the status of a single bit in a memory byte or register operand. The Z flag is set according to the bit state. .end CALL q :12,0CDH,qqqqqqqqB,qqqqqqqqB,'Subroutine Call ,....' Z,q :12,0CCH,qqqqqqqqB,qqqqqqqqB NZ,q :12,0C4H,qqqqqqqqB,qqqqqqqqB C,q :12,0DCH,qqqqqqqqB,qqqqqqqqB NC,q :12,0D4H,qqqqqqqqB,qqqqqqqqB .help Subroutine call. On execution the PC address (of the following instruction) is pushed onto the stack and program execution begins at the supplied operand address. Conditional test before execute is allowed, whereby only if the specified condition is met will the subroutine be executed. .end CCF . :4,03FH,'Complement Carry,.0U' .help Complement carry flag. The C status register flag is modified to the opposite state. .end CP (HL) :8,0BEH,'Compare Acc ,.' g :4,10111gggB n :8,0FEH,nnnnnnnnB .help Compare an operand to the A register. The comparison is calculated by subtracting the operand and discarding the result (ie A is not affected). .end CPL . :4,02FH,'Complement Acc ,.11.' .help Complement A register. The bits of the A register are modified to the opposite state. This is often referred to as one's complement. .end DAA . :4,027H,'BCD Adjust Acc ,' .help Decimal adjust A register. Assuming that the A register holds the result of a previous packed BCD arithmetic operation, this operation converts the upper/lower nibbles into valid BCD representation. Note that the status flags must not have been modified since the arithmetic operation. .end DEC (HL) :12,035H,'Decrement ,?*?.' r :4,00rrr101B w :8,00ww1011B .help Decrements an operand. Byte operand decrements also affect the status flags equivalent to the subtract operation, this includes indirect and indexed memory operands. Word register decrements have no effect on the status flags. .end DI . :4,0F3H,'Disable Mask-Int,....' .help Disables CPU recognition of interrupts. (also see EI instruction). .end EI . :4,0FBH,'Enable Mask-Int ,....' .help Enables CPU recognition of interrupts after being disabled with the similar DI instruction. The interrupts are not enabled until the following instruction has been executed. .end HALT . :4*n,076H,'Halt CPU Exec. ,....' .help Halt CPU execution. This state is only terminated on an interrupt (or system reset). Use wherever possible to reduce power consumption. .end INC (HL) :12,034H,'Increment ,???.' r :4,00rrr100B w :8,00ww0011B .help Increments an operand. Byte operand increments also affect the status flags equivalent to the add operation, this includes indirect and indexed memory operands. Word register increments have no effect on the status flags. .end JP (HL) :4,0E9H,'Jump Absolute ,....' q :12,0C3H,qqqqqqqqB,qqqqqqqqB Z,q :12,0CAH,qqqqqqqqB,qqqqqqqqB NZ,q :12,0C2H,qqqqqqqqB,qqqqqqqqB C,q :12,0DAH,qqqqqqqqB,qqqqqqqqB NC,q :12,0D2H,qqqqqqqqB,qqqqqqqqB .help Program jump. On execution the PC is modified to the supplied operand address. Conditional test before execute is allowed, whereby only if the specified condition is met will the PC be modified. Indirect jumps via addresses stored in the HL register is allowed but these cannot be conditional. .end JR e :8,018H,eeeeeeeeB,'Jump Relative ,....' Z,e :8,028H,eeeeeeeeB NZ,e :8,020H,eeeeeeeeB C,e :8,038H,eeeeeeeeB NC,e :8,030H,eeeeeeeeB .help Relative program jump. On execution the PC is modified to the supplied operand address as with the JP instruction above, except the operand supplied is an offset to the current PC value. Thus this type of instruction is more efficient and program address independent. However, you must provide the absolute address and the assembler automatically calculates the offset. .end LD (q),A :16,0EAH,qqqqqqqqB,qqqqqqqqB,'Load Reg/Mem ,???.' (BC),A :8,002H (DE),A :8,012H (HL),g :8,01110gggB (HL),n :12,036H,nnnnnnnnB A,(q) :16,0FAH,qqqqqqqqB,qqqqqqqqB A,(BC) :8,00AH A,(DE) :8,01AH r,(HL) :8,01rrr110B r,g :4,01rrrgggB r,n :8,00rrr110B,nnnnnnnnB v,q :10,00vv0001B,qqqqqqqqB,qqqqqqqqB SP,HL :6,0F9H (HLD),A :8,032H A,(HLD) :8,03AH (HL-),A :8,032H A,(HL-) :8,03AH (HLI),A :8,022H A,(HLI) :8,02AH (HL+),A :8,022H A,(HL+) :8,02AH A,(C) :8,0F2H (C),A :8,0E2H .help Load register/memory with register/memory/immediate. There are a variety of load operand variations which are fully listed within the ECAL Diagnostic Help Window. The only absence is the ability to load memory from memory. None of the load instructions affects the status register. .end LDD (HL),A :8,032H,'Load & decr ,???.' A,(HL) :8,03AH .help Load register/memory with register/memory then decrement HL. Neither of the load instructions affect the status register. .end LDH (n),A :12,0E0H,nnnnnnnnB,'Load (Hi Page) ,???.' A,(n) :12,0F0H,nnnnnnnnB .help Load register/memory with register/memory on the page FFxx. Neither of the load instructions affect the status register. .end LDI (HL),A :8,022H,'Load & incr ,???.' A,(HL) :8,02AH .help Load register/memory with register/memory then increment HL. Neither of the load instructions affect the status register. .end NOP . :4,000H,' ,....' .help No operation. No action is taken by this instruction, neither are any flags affected. .end OR (HL) :8,0B6H,'Boolean OR Acc ,00' g :4,10110gggB n :8,0F6H,nnnnnnnnB .help Logical OR an operand to the A register, with the result being returned to the A register. .end POP p :12,11pp0001B,'Pop Reg STACK ,....' .help Removes a word from the current stack and places the data into a specified word register. Although the AF register can be loaded, the status flags are unchanged for all executions. All POPs cause the stack pointer to be incremented in preparation for a following POP or PUSH. .end PUSH p :16,11pp0101B,'Push Reg STACK ,....' .help Saves the contents of a specified register onto the current stack area which is the opposite affect of the POP instruction above. All PUSHes cause the stack pointer to be decremented for a following POP or PUSH. .end RES b,(HL) :16,0CBH,086H,'Reset Bit ,....' b,g :8,0CBH,10bbbgggB .help Resets a single bit in a memory byte or register operand. .end RET . :8,0C9H,'Return From CALL,....' Z :8,0C8H NZ :8,0C0H C :8,0D8H NC :8,0D0H .help Return from subroutine. This instruction is the complement to the CALL instruction, in that it returns the PC value (by removing the address from the stack area) to the address following the CALL instruction that instigated the subroutine. Conditional test before execute is allowed, whereby only if the specified condition is met will the RET instruction be executed. .end RETI . :8,0D9H,'Return Interrupt,....' .help Return from interrupt and enable interrupts. Unlike the standard RET instruction no conditional tests are allowed. .end RL (HL) :16,0CBH,016H,'Rot Lft Thrgh C ,00*' g :8,0CBH,00010gggB .help Rotates a memory byte or register left one bit position through the C flag. The C flag becomes bit 0 and the contents of bit 7 are moved into the C flag. .end RLA . :4,017H,'Rot Lft Thr-C A ,.00*' .help Rotate the A register left one bit through the C flag. As RL except has a more efficient opcode/execution and, unlike the standard RL, the Z flag is not affected. .end RLC (HL) :16,0CBH,006H,'Rot Lft Brnch C ,00*' g :8,0CBH,00000gggB .help Rotates a memory byte or register left one bit position, with bit 7 also being copied into the C flag as well as bit 0. .end RLCA . :4,007H,'Rot Lft Brn-C A ,.00*' .help Rotates the A register left one bit position. As RLC except has a more efficient opcode/execution and, unlike the standard RLC, the Z flag is not affected. .end RR (HL) :16,0CBH,01EH,'Rot Rgh Thrgh C ,00*' g :8,0CBH,00011gggB .help Rotates a memory byte or register right one bit position through the C flag. The C flag becomes bit 7 and the contents of bit 0 are moved into the C flag. .end RRA . :4,01FH,'Rot Rgh Thr-C A ,.00*' .help Rotate the A register right one bit through the C flag. As RL except has a more efficient opcode/execution and, unlike the standard RL, the Z flag is not affected. .end RRC (HL) :16,0CBH,00EH,'Rot Rgh Brnch C ,00*' g :8,0CBH,00001gggB .help Rotates a memory byte or register right one bit position, with bit 0 also being copied into the C flag as well as bit 7. .end RRCA . :4,00FH,'Rot Rgh Brn-C A ,.00*' .help Rotates the A register right one bit position. As RLC except has a more efficient opcode/execution and, unlike the standard RLC, the Z flag is not affected. .end RST x :32,xxxxxxxxB,'Restart Call ,....' ^x :32,11xxx111B .help Restart at one of eight page 0 memory address locations. The PC is saved onto the stack as for a CALL operation then the PC is loaded with the specified page 0 memory address from where program execution continues. As this instruction is a single byte CALL it is common practice to arrange for frequently called subroutines to be called via this operation. The 'RST 38H' instruction (FFh) is frequently called as the result of programming errors. .end SBC A,(HL) :8,09EH,'Sub With Carry ,1?' A,g :4,10011gggB A,n :8,0DEH,nnnnnnnnB .help Subtract an operand from the A or HL register plus the C flag from the status register. .end SCF . :4,037H,'Set Carry Flag ,.001' .help Set carry flag. The C status register flag is set. .end SET b,(HL) :16,0CBH,11bbb110B,'Set Bit ,....' b,g :8,0CBH,11bbbgggB .help Resets a single bit in a memory byte or register operand. .end SLA (HL) :16,0CBH,026H,'Shift Left Arith,00*' g :8,0CBH,00100gggB .help Shifts a memory byte or register left one bit position. The C flag becomes bit 7 and bit 0 is reset. This is often referred to as an arithmetic/logical shift. .end SRA (HL) :16,0CBH,02EH,'Shift Rght Arith,00*' g :8,0CBH,00101gggB .help Shifts a memory byte or register right one bit position. The C flag becomes bit 0 and bit 7 remains unchanged (ie bit 7 is copied). This is often referred to as an arithmetic shift. .end SRL (HL) :16,0CBH,03EH,'Shift Rght Logic,00*' g :8,0CBH,00111gggB .help Shifts a memory byte or register right one bit position. As SRA except bit 7 is always reset. This is often referred to as a logical shift. .end STOP . :4,10H,00H,'Halt CPU & LCD,....' .help Halt CPU and LCD execution. .end SUB (HL) :8,096H,'Subtract Excl. C ,1' g :4,10010gggB n :8,0D6H,nnnnnnnnB .help Subtract an operand from the A register. .end SWAP A :8,0CBH,37H,'Swap nibbles,?0' B :8,0CBH,30H C :8,0CBH,31H D :8,0CBH,32H E :8,0CBH,33H H :8,0CBH,34H L :8,0CBH,35H (HL) :8,0CBH,36H .help Swap the nibbles of the register specified. .end XOR (HL) :8,0AEH,'Boolean XOR Acc ,000' g :4,10101gggB n :8,0EEH,nnnnnnnnB .help Logical XOR an operand to the A register, with the result being returned to the A register. .end ;------------------------------------------------------------------------------